FPGA-Based Deep Learning Processor: A Review

Abstract

The rapid adoption of deep learning across diverse application areas has intensified the demand for specialized hardware capable of efficiently executing computationally intensive neural networks at scale. Field-Programmable Gate Arrays (FPGAs) have emerged as a prominent solution, offering a unique combination of high parallelism, low latency, and energy efficiency. Despite these advantages, research remains fragmented, with challenges in standardizing architectures, optimizing design flows, and supporting emerging neural network models, including transformers and generative architectures. This review systematically examined recent developments in FPGA-based deep learning processors, focusing on architectural design strategies, optimization methodologies, and deployment across both cloud and edge environments. A structured survey approach was employed, analyzing experimental evaluations and comparative studies of FPGA accelerators for convolutional, recurrent, and next-generation neural networks. The analysis demonstrated that FPGA-based designs consistently achieved superior energy efficiency compared to GPUs and provided scalable solutions for edge inference, though limitations persist in programmability and toolchain maturity. The findings highlighted FPGAs’ potential as critical enablers for next-generation intelligent systems while emphasizing the need for higher-level abstractions, automated design-space exploration, and seamless integration with evolving machine learning frameworks.